How to burn jic files into FPGA?

 A .jic file is most commonly an Intel/Altera Quartus “JTAG Indirect Configuration” image used to program the external configuration flash (EPCS/EPCQ/QSPI) through the FPGA’s JTAG, so the FPGA can boot from flash after reset/power-cycle.



0) Quick clarity: .SOF vs .JIC

  • .sof → programs the FPGA directly (volatile). Works immediately, lost on power-off.

  • .jic → programs the configuration flash (non-volatile). FPGA loads from flash on reboot.

A) Program a .JIC into the flash (Quartus GUI)

1) Hardware + board setup

  • Connect USB-Blaster / USB-Blaster II (or compatible) to the board’s JTAG header.

  • Power the board.

  • Set any board jumpers/switches to allow JTAG access (varies by board).

2) Open Quartus Programmer

  1. Tools → Programmer

  2. Click Hardware Setup…

    • Select your cable (e.g., USB-Blaster), then Close

  3. Set Mode = JTAG

3) Detect the JTAG chain

  1. Click Auto Detect

  2. Quartus should show your FPGA device in the chain.

4) Attach the flash device (this step is often required)

If you only see the FPGA (common):

  1. Right-click the FPGA in the chain

  2. Choose Attach Flash Device…

  3. Select the correct flash type/model (EPCS/EPCQ/QSPI part used on your board)

If you don’t know the flash model, check the board schematic/BOM or read the marking on the flash chip.

5) Load and program the .jic

  1. Click Add File… and choose your .jic

  2. Ensure the file is associated with the flash device entry (not just the FPGA)

  3. Tick:

    • Program/Configure

    • (Recommended) Verify

  4. Click Start

When done, power-cycle or reset the board to confirm it boots from flash.

B) Create a .JIC (if you only have a .SOF)

In Quartus:

  1. File → Convert Programming Files…

  2. Programming file type: JTAG Indirect Configuration File (.jic)

  3. Configuration device: select your flash model (EPCS/EPCQ/QSPI)

  4. Input files: add your .sof (or .pof, depending on flow)

  5. Let Quartus pick the correct Flash Loader (or select the matching FPGA family)

  6. Generate the .jic

Then program it using steps in section A.

C) Command line programming (Quartus)

You can program a .jic via quartus_pgm:

quartus_pgm -c "USB-Blaster" -m jtag -o "p;output.jic"

Common extras:

  • Program + Verify:

quartus_pgm -c "USB-Blaster" -m jtag -o "pv;output.jic"

(Exact operation letters can differ slightly by Quartus version, but p is program and v is verify in the common flow.)

D) Typical “it won’t program” fixes

  • Wrong flash part selected in “Attach Flash Device”

  • JTAG chain not stable → lower JTAG clock in Hardware Setup

  • Board jumpers/switches not set for JTAG/AS mode correctly

  • No common ground / power issues

  • Using .jic for the wrong board layout (wrong flash size, wrong address map)

Important note (Xilinx users)

If you’re on Xilinx, you usually won’t use .jic. You’ll use .mcs/.bin and program configuration memory in Vivado Hardware Manager. So “.jic” strongly suggests Intel/Altera flow.

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