What format does a makefile have to be while uploading it on a FPGA board?

Short answer: you don’t upload a Makefile to an FPGA at all.

An FPGA never “sees” your Makefile—only the bitstream (or similar config file) that the tools generate from your HDL.

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What’s actually going on

• Makefile

  • Plain text file for your PC, read by make (GNU make, nmake, etc.).

  • It just tells the host tools what commands to run:

    • synthesize HDL

    • run place & route

    • generate bitstream

    • optionally call the programmer to flash the FPGA

• FPGA input
  The FPGA only gets a configuration file, typically something like:

  • Xilinx: .bit, .bin, sometimes .mcs

  • Intel/Altera: .sof, .pof, .rbf

  • Lattice: .jed, .bit, etc.

So there is no special “format” for the Makefile for the FPGA. The format requirement is simply:

• It must be a valid Makefile syntax for make on your PC.

• Stored as plain text (no Word, no PDF, etc.).

• Usually named Makefile or makefile so make finds it automatically.

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Typical flow

1. You write Makefile with rules like:

# Example: build + program for some generic board
TOP      := top
BIT      := build/$(TOP).bit

all: $(BIT)

$(BIT): $(TOP).v
	# call your FPGA toolchain here
	vivado -mode batch -source build.tcl

program: $(BIT)
	openFPGALoader -b myboard $(BIT)

clean:
	rm -rf build

2. On your PC you run:

make        # builds the bitstream
make program  # uses the bitstream to program the FPGA

3. The FPGA only ever receives top.bit (or whatever bitstream), not the Makefile.