Is there a bug in the hardware I2C of STM32F103RCT6?
The STM32F103RCT6, part of the STM32F1 series, does have known hardware issues with the I2C peripheral, especially in early silicon revisions. These issues are well-documented in the ST errata sheets.
Known I2C Issues in STM32F103RCT6
From the STM32F103xC/D/E errata sheet, here are some notable I2C-related bugs:
1. I2C Busy Flag Stuck (BSY bit never cleared)
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Issue: If a communication is interrupted (e.g., by a reset or a glitch), the I2C peripheral can think the bus is still busy.
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Impact: The
I2C_SR2.BSYbit stays high indefinitely, preventing further communication. -
Workaround: You must manually reset the I2C peripheral and reinitialize it.
2. Failure to Detect Stop Condition
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Issue: Under some conditions, the STOP condition is not correctly detected by the I2C hardware.
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Impact: The I2C peripheral might hang or misbehave after repeated communications.
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Workaround: Often handled by carefully placing delays and confirming the STOP bit in software.
3. Stretching or Clock Synchronization Issues
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Issue: The hardware doesn’t always handle clock stretching or arbitration well, especially under high loads or interrupts.
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Impact: Loss of synchronization with slave devices.
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Workaround: Use lower speeds (100 kHz), check timing margins, and avoid DMA for I2C in F1 series.
Recommended Workarounds
If you're using HAL, and your I2C gets stuck, try this recovery function:
If using bare-metal or LL, do a similar register-level reset and reconfigure the pins as I2C.
You can also implement a manual I2C bus recovery sequence:
Further Suggestions
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Download the Errata Sheet for STM32F103xC/D/E and check Section 2.11 I2C peripheral limitations.
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Always use the latest STM32CubeF1 HAL package (some workarounds are built-in).
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Avoid using I2C in high-speed or DMA mode on STM32F1 unless absolutely needed.

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